How could external chips (e.g., MCU) reset GS2000?

  • There are two pins exposed to silicon (EXT_RESET_n pin & EXT_RTC_RESET_n pin).
  • 'EXT_RESET_n' is same as GS1011. It's connected to VDDIO domain hence it can't be asserted in standby. Only after internal voltage stabilizes it can be asserted. Till internal voltage regulator is stabilized this pin act as output and from then it act as input. For backward compatibility this is what is exposed in 2011 module.
  • 'EXT_RTC_RESET_n pin' is connected to VDDRTC domain, hence this could be asserted even in standby. This issues a POR RTC reset hence it will be a cold boot. All RTC registers will get cleared, all contents of RTC 16KB RAM will get cleared (since during this time, dc-dc-cntrl goes down which cut of external regulator and hence voltage to internal regulator). But contents of 1KB latch memory will be still there.
  • 68 pin soc bring out only 'EXT_RTC_RESET_n' hence 2100 module has only this reset.
  • EXT_RTC_RESET_n pin is always input unlike EXT_RESET_n.
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